Semiconductor Process Technologies (SPT)

With the help of advanced Si micro and nano-fabrication technologies, the R&D activities of SPT Lab focus on the CMOS-compatible Si nanowire devices and applications, Si Photonics and MEMS.

Research Areas
  • CMOS-compatible Si Nanowire based Nanoelectronics
    • Si / SiGe / Ge Nanowire Gate All Around (GAA) MOSFETs
    • One-Dimensional Device Transport Analysis
    • Nanowire memories
  • Si Photonics
    • Active components – Modulator, Photo-detector, Light emitter
    • Passive components – Waveguide, Splitter, Taper, Coupler, Ring Resonator
    • Photonic Crystal Devices
  • Si process technologies for MEMS, NEMS, 3D, heterogeneous integration, Wafer Level Packaging applications and Bio-Sensors

Project Highlights
  • Established a top-down, CMOS-compatible technology for forming Si nanowire down to 3 nm diameter. Gate All Around Field Effect Transistors (GAA-FETs) and inverter circuits have been demonstrated. The transistors have excellent drive current and near ideal sub-threshold slopes. GAAFETs architecture is considered as a prominent candidate for “end of the roadmap” CMOS technology regime. Also demonstrated 3-dimensionally stacked SiGe nanowires GAA-FETs which can help increase the device density
  • Demonstrated Si based photonic crystal high Q resonators, photonic crystals exhibiting negative refraction (in collaboration with Columbia University, USA)
  • Demonstrated Si photonics device design and process capabilities for both passive and active devices based on SOI CMOS platform and selective Ge Epitaxial process, such as novel ultra-sharp tipped mode-converter, wire-based and photonic-crystal-based waveguides, bends, splitters, ring resonator, directional coupler, AWG and waveguided photodetector
  • Developed analytical techniques to estimate lattice strain using high resolution transmission electron microscopy and demonstrated with MOSFET drive current enhancement performance.
  • Developed Wafer Transfer Technology to effect wafer level transfer of circuit patterns from Si onto plastic, glass or rubber. Demonstrated integration of RF MEMS with CMOS on insulating substrates
  • Established MEMS process capabilities such as Deep RIE, wafer-to-wafer or wafer-to-glass bonding, wafer backside lithography for a variety of applications such as accelerometer, micromirror and microfluidics.

Advanced Services

IME provides Advanced Analytical services to the industry using technologies or know-hows that were previously developed by IME through its R&D programmes. For details, click here


Our Facilities

  • 2100 m2 8" Silicon Fab equipped with SMIF mini-environment for the fabrication of CMOS micro/nanoelectronic devices, Silicon-based Photonics devices, MEMS/NEMS, bio-sensors and Wafer Level Packaging
  • Materials Characterization and Analysis lab for structural analysis, surface analysis, device/package diagnostics & reliability



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