Patents

Patents | ICS Patents | SPT Patents

MMC Patents


US Pat 7,230,318 RF and MMIC stackable micro-modules
US Pat 7,189,594 Wafer level packages and methods of fabrication
US Pat 7,183,176 Method of Forming Through Wafer Interconnects for Vertical Wafer Level Packaging
US Pat 7,178,711 Method and device to elongate a solder joint
US Pat 7,160,756 Polymer encapsulated dicing lane (PEDL) technology for Cu/low/Ultra-Low k devices
US Pat 7,160,025 Micromixer apparatus and methods of using same
US Pat 7,141,487 Method for ultra thinning bumped wafers for flip chip
US Pat 7,091,057 Method of making a single-crystal-silicon 3D micromirror

US Pat 6,890,795

Wafer level super stretch solder

US Pat 6,879,287

Packaged integrated antenna for circular and linear polarizations

US Pat 6,873,527 Heat Transfer Apparatus

US Pat 6,858,459

Method of Fabricating Micro-Mirror Switching Device

US Pat 6,855,640

Apparatus and process for bulk wet etch with leakage protection

US Pat 6,808,644

Capillary with glass internal surface

US Pat 6,787,456

Wafer-level inter-connector formation method

US Pat 6,765,300

Micro-relay

US Pat 6,759,319

Residue-free solder bumping process

US Pat 6,762,049

Miniaturized multi-chamber thermal cycler for independent thermal multiplexing

US Pat 6,717,812

Apparatus and method for fluid-based cooling of heat-generating devices

US Pat 6,716,661

Process to fabricate an integrated micro-fluidic system on a single wafer

US Pat 6,710,438

Enhanced chip scale package for wire bond dies

US Pat 6,662,654

Z-axis Accelerometer

US Pat 6,621,151

Lead Frame for an Integrated Circuit Chip

US Pat 6,617,667

Optical device carrier

US Pat 6,566,650

Incorporation of Dielectric Layer onto SThM Tips for Direct Thermal Analysis

US Pat 6,608,379

Enhanced Chip Scale Package for Flip Chips

US Pat 6,599,138

High Frequency Board-To-Board Connector

US Pat 6,573,154

High aspect ratio trench isolation process for surface micromachined sensors and actuators

US Pat 6,571,628

Z-axis accelerometer

US Pat 6,583,501

Lead frame for an integrated circuit chip (integrated circuit peripheral support)

US Pat 6,537,411

Method for low temperature lamination of metals to polyimides

US Pat 6,540,866

Method for Lamination of Fluoropolymer to Metal and Print Circuit Board (PCB) Substrate

US Pat 6,521,447

Miniaturized thermal cycler

US Pat 6,509,186

Miniaturized thermal cycler

US Pat 6,503,847

Room temperature wafer-to-wafer bonding by polydimethylsiloxane

US Pat 6,483,223

Method to prevent charging effects in electrostatic devices

US Pat 6,461,888

Lateral polysilicon beam process

US Pat 6,432,695

Miniaturized thermal cycler

US Pat 6,424,047

Plastic ball grid array package for passing JEDEC level 1 moisture sensitivity test

US Pat 6,334,926

Method for low temperature lamination of metals to fluoropolymers

US Pat 6,293,148

Structural design for improving the sensitivity of a surface-micromachined vibratory gyroscope

US Pat 6,274,650

Epoxy resin compositions for liquid encapsulation

US Pat 6,263,740

CMOS compatible integrated pressure sensor

US Pat 6,225,140

CMOS compatible surface machined pressure sensor and method of fabricating the same

US Pat 6,122,975

CMOS compatible integrated pressure sensor

US Pat 6,121,065

Wafer scale burn-in testing

US Pat 6,007,728

Design of a novel tactile sensor

US Pat 5,967,577

Apparatus for dispensing fluid in an array pattern

US Pat 5,930,595

Isolation process for surface micromachined sensors and actuators

US Pat 5,925,934

Low cost and highly reliable chip-sized package

US Pat 5,893,724

Method for forming a highly reliable and planar ball grid array package

US Pat 5,892,290

Highly reliable and planar ball grid array package

US Pat 5,836,520

Apparatus for dispensing fluid in an array pattern

US Pat 5,773,878

IC packaging lead frame for reducing chip stress and deformation


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