IME researchers have delineated the impact of quantum mechanical effects on the electrical transport in Si nanowire transistors which are targeted for end-of-the-roadmap CMOS logic and memory technologies.

Gate-all-around n-MOSFETs with Si-nanowire (~7nm) as the channel body, characterised for their low-temperature (~5 to 295K)IDS-VGS behaviour  at low VDS (~50mV) exhibit a decrease in current with decreasing temperature in strong inversion from ~200K to ~5K. This is contrary to expectation as impact of phonon scattering reduces as the temperature decreases. It is inferred that at low VDS, the enhancement in phonon limited mobility μph at reduced temperature is possibly masked by the inter-sub-band scattering on account of sub-band splitting in the conduction band due to quantum-confinement effects as indicated by sub-band calculations for nanowire structures.

Measured IDS-VGS characteristics of ~7nm triangular SiNW n-FET with effective gate length ~ 300nm at different temperatures at VDS=50mV at 5K, 37K, 77K, 137K, 200K and 295K. Inset shows the TEM cross-section of Gate-All-Around nanowire MOSFET Channel.

Discrete energy levels in the silicon conduction band for different diameters of the nanowire from solution of Schrödinger's equation.