SEMICONDUCTOR PROCESS TECHNOLOGIES LABORATORY

1. Senior Research Engineer - CMP and Wafer Cleaning

Responsibilites:

You will lead a small team in the Si process integration for developing and implementing novel CMOS compatible Si photonics and / or MEMS devices. Your responsibilities include developing and maintaining the CMP capability for IME's R&D and Industry Projects, as well as establishing the set up Etch-rate and particles chart for all the wet benches/tanks. You will also be responsible for the ISO audit matters for the Lab.

Requirements:

  • PhD degree in Engineering, Physics or equivalent specializing in Microelectronics / Photonics / MEMS
  • Experienced in CMOS process integration and wafer fabrication technology
  • Knowledge of device characterization and semiconductor device / MEMS / Photonics
  • A team player with good communication and interpersonal skills

2. Laboratory Officer - Chemical Management

Responsibilites:

  • Chemical store maintenance
  • Chemicals receiving
  • Safety/licenses/MSDS
  • Chemical disposal

Requirements:

  • Diploma/Degree in Chemical Engineering/Materials Science with 1 - 2 years relevant experience

3. Research Officer / Research Engineer

Surround Gate Transistor

Responsibilites:

To assist Senior Researchers in the following areas:

  • Oversee and manage the designing, planning, implementation and prototyping of a Surround Gate Transistor
  • Testing and commissioning of the Surround Gate Transistor
  • Simulations of the device using state of the art simulation software
  • Maintaining technical documentation on the progress of project
  • Preparing progress reports and progress projections
  • Rectifications wherever needed

4. Senior Research Engineer

MOS Transistor and Pool Circuit

Responsibilites:

You will be responsible for one or more of the following:

  • Computer simulation of MOS transistor device and pool circuit device using Silvaco software
  • Design and process of MOS transistor
  • Simulation of MOS transistor and pool circuit device
  • Troubleshoot and test devices and pool circuits

Requirements:

  • Masters / PhD in Physics
  • Good understanding of planar transistor (p-n-p or n-p-n)
  • Demonstrated ability to provide detailed description of a thesis or publication made by student
  • Strong oral and communication skills
  • Ability to work with a multicultural team of people

For position 3

  • Preferably 2-3 yrs working experience
  • Fresh graduates are welcome to apply

For position 4

  • Preferably 5yrs or more working experience

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